Hello FPGA — Xilinx ISE setup on Ubuntu

7 min readDec 18, 2020

When it comes to FPGA design, you need to use a set of software to “compile” your description file and to program it through the JTAG port. However, while this software is often designed to run flawlessly on Windows, it is not always the case on Linux and more especially on YOUR Linux distribution.

In this article, I describe how to install, set up and flash a circuit (described in Verilog) on the Nexys 3 using ISE WebPack on Ubuntu (20.04).

Nexys 3

The Nexys 3 is a board built around a Spartan 6 FPGA chip from Xilinx. It can be programmed through a USB cable and feature several I/O interfaces such as USB, Ethernet or VGA. The FPGA itself contains 2278 slices, 576Kb of RAM, 32 DSP slice and an internal clock of 500MHz. We can also find a bunch of buttons, switches, LEDs and 7 segment display and some expansion port such as a VHDC connector and 4 Pmod ports. This information as well as the pinout can be found on the reference manual. However, since we use a Spartan 6 chip, the toolchain required is contained in ISE which is compatible with Windows 7 at most, SUSE Enterprise 11 and Red Hat Enterprise Workstation 5/6 as stated in this document. However, in 2020, we may want to run another distribution of Linux such as Ubuntu.

ISE WebPack

As stated earlier, ISE Webpack is not fully compatible with Ubuntu. To be fair, the main problem resides in the support of the cable driver. Therefore we can install the design suite with no problem.

ISE WebPack installation

You can find the software on the Xilinx website. You can select the 14.7 version then scroll to the ISE Design Suite and take care to download the Full Installer for Linux (You don’t want to make a mistake when the download’s size is about 6GB). You will need to create a Xilinx account.

You can extract the TAR file wherever you want on your computer. You may need to add the execution right to the file xsetup

sudo chmod +x xsetup

The your can run the file being a sudo user

sudo ./xsetup

Agree the licenses, terms and condition, then select the ISE WebPACK option.

You can now leave the already ticked boxes and tick the “instal driver” option.

You can then continue with the location of the installation. The default one it in /opt/Xilinx/14.7/ISE_DS . It will bring you an error about the cable driver installation but the Design suite is installed. However, we can complete the installation by adding some scripts to get an icon as explained in this article.

Adding a shortcut

First, we’re going to create a script creating a valid environment for ISE.

sudo nano /opt/Xilinx/14.7/ISE_DS/ise

Then, paste ( Ctrl + Maj + V ) the following content in the file :

#!/bin/bash
export LD_PRELOAD=/opt/Xilinx/usb-driver/libusb-driver.so
ISE_DS_DIR=/opt/Xilinx/14.7/ISE_DS
unset LD_PRELOAD
export gmake=/usr/bin/makecd "$ISE_DS_DIR"
source "$ISE_DS_DIR"/settings64.shexport LANG=''  # reset locale to English to fix decimal/comma seperation"$ISE_DS_DIR"/ISE/bin/lin64/ise

You now need to make this script executable :

sudo chmod a+x /opt/Xilinx/14.7/ISE_DS/ise

We just have to create the shortcut with a .desktop file:

sudo nano /usr/share/applications/ISE.desktop

Containing:

[Desktop Entry]
Version=1.0
Name=ISE
Exec=/opt/Xilinx/14.7/ISE_DS/ise
Terminal=false
Icon=/opt/Xilinx/14.7/ISE_DS/ISE/data/images/pn-ise.png
Type=Application
Categories=Development

Now, you can save the file and search for the application ISE in Ubuntu’s research bar.

Cable Drivers

As you noticed you got some errors at the installation of the cable drivers. We are now going to solve this problem.

Cable driver install

First, we can install the support files as described by the above-cited article.

sudo apt-get install libusb-dev libftdi-dev build-essential libc6-dev fxloadcd /opt/Xilinx
sudo git clone git://git.zerfleddert.de/usb-drivercd usb-driver/
sudo make./setup_pcusb /opt/Xilinx/14.7/ISE_DS/ISE/echo PATH=\$PATH:/opt/Xilinx/13.2/ISE_DS/ISE/bin/lin64/ >> ~/.bashrc
echo export PATH >> ~/.bashrc

You might get some warning at the compilation, you can ignore them. However, these tasks alone are not sufficient.

Digilent’s solution

You can install the Digilent’s Adept 2 as suggested by attila on this forum answer. You will need to download the runtime and the utility on this page. You will not need the System and the SDK, only the Runtime and the Utilities are useful.

Once you downloaded them, install the .deb files:

sudo dpkg -i digilent.adept.runtime_2.21.2-amd64.deb
sudo dpkg -i digilent.adept.utilities_2.4.1-amd64.deb

Note: You will need to modify the version by yours.

After the installation you can finally plug your board on the USB PROG and Trun ON the board with the POWER switch . Then run the command :

djtgcfg enum

You should see your device through the output :

Found 1 device(s)Device: Nexys3
    Device Transport Type: 00010001 (USB)
    Product Name:          Nexys3
    User Name:             Nexys3
    Serial Number:         xxxxxxxxxxxx

Congratulation, your FPGA Board is now connected and operational!

A testing project

We are going to create a simple project using the switches 0, 1 and 2 to control the LEDs 0 to 7. The combination of the 3 switches gives a binary number turning on the corresponding LED. This part follows the tutorial of Jim Duckworth adapted to our version. Do not hesitate to follow this PDF to get more details.

Creating the project

Start ISE and creat a new project with the name you want and the location you want. Next >
We can ignore the first value and focus on
- Family: Spartan6
- Device: XC6SLX46
- Package: CSG324
- Speed: -3 or -2
- Synthesis Tool: XST
- Similator: ISim
- Prefered Language: Verilog
Next >
A summary will appear at the screen, if everything is correct: Finish

Adding the code

On the left side bar, click on the New Source icon then select Verilog Module. We are gonna name it “decoder”. Next >

We will output 8 signals on 8 LED from the LED0 to the LED7 and get 3 input signals from the switches 0, 1 and 2.

We just need to add the following lines in the module definition (right before endmodule ):

assign o_led = (i_sw ==3'b000) ? 8'b00000001 : 
 (i_sw ==3'b001) ? 8'b00000010 : 
 (i_sw ==3'b010) ? 8'b00000100 : 
 (i_sw ==3'b011) ? 8'b00001000 : 
 (i_sw ==3'b100) ? 8'b00010000 : 
 (i_sw ==3'b101) ? 8'b00100000 : 
 (i_sw ==3'b110) ? 8'b01000000 : 8'b10000000;

Note: You notice that I started the name of the output by o_ and the name of the input by i_ . This is not mandatory but I recommend it.

You can now double-click on Synthesize — XST to validate your code.

We now need to describe which pins of the board we are going to use. Open the User Constraints and double-click on I/O Pin Planning (PlanAhead) — Post Synthesis). Yes, add an UCF file. A new window appear. In the bottom part, enlarge i_sw and apply in the site column the corresponding number written on the board. Same for the o_led. Take care that the I/O Std is at LVCMOS33.

Save it (File > Save Constraints) and close the window. Back to ISE, Reload the files if it is asked.

Now, Double click to :

Implement design
Generate Programming File

If it is all green, all is good and we can continue. Otherwise, you need to correct the errors and the warnings displayed in the console.

Now it is time to flash or bit file. Double-click on Configure Target Device, OK the warning and welcome in a new window. From now on, we follow this tutorial by Pr. brunvand and Paymon Saebi. On the left side, double-click on Bondary Scan then right-click on the blue text in the middle: Initialize Chain. Your device should have appeared, you can press Yes and select the decoder.bit generated file. Press no on the Attach SPI or BPI PROM since we don’t use them. Then press OK in the last window.